SMART's Compute Express Link Add-in Cards Expand Memory Capacity

 

SMART Modular’s new high-density DIMM Add-in Cards (AICs) are the first in their class to adopt the Compute Express Link/CXL protocol, enabling server and data center architects to add up to 4TB of memory in an easy-to-deploy form factor, available in 8-DIMM and 4-DIMM configurations. (Photo: Business Wire) 

KUALA LUMPUR, April 24 (Bernama) -- SMART Modular Technologies Inc (SMART), a division of SGH, has announced its new family of Add-In Cards (AICs) which implements the Compute Express Link (CXL) standard and also supports industry standard DDR5 DIMMs.

According to a statement, these are the first in their class, high-density DIMM AICs to adopt the CXL protocol, enabling server and data centre architects to add up to four terabyte (TB) of memory in a familiar, easy-to-deploy form factor.

“The CXL protocol is an important step toward achieving industry standard memory disaggregation and sharing which will significantly improve the way memory is deployed in the coming years,” said SMART Modular senior director of advanced product development, Andy Mills.

SMART’s 4-DIMM and 8-DIMM AICs are built using advanced CXL controllers which eliminate memory bandwidth bottlenecks and capacity constraints for compute-intensive workloads encountered in artificial intelligence, high performance computing, and machine learning.

These emerging applications require larger amounts of high-speed memory that exceed what current servers can accommodate.

Attempts to add more memory via the traditional DIMM-based parallel bus interface is becoming problematic due to pin limitations on CPUs, hence the industry is turning to CXL-based solutions which are more pin efficient.

CXL also enables lower cost scaling of memory capacity, in which using Smart’s AICs enables servers to reach up to 1TB of memory per CPU with cost effective 64 gigabyte (GB) RDIMMs.

They also offer an opportunity for supply chain optionality, whereby replacing high density RDIMMs with a greater number of lower density modules can enable lower system memory costs depending on market conditions.

-- BERNAMA